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Full technical papers: 30% discount

London, Las Vegas

Next ERSA-ADN Conferences will be arranged with new partners

  • Industrial Section
  • Academic Section
  • Demos & Exhibitions
  • ERSA-ADN Awards
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The Journal
“Application Developers News”
has been launched

Application Developers News

Developers of Heterogeneous Computing Systems

ERSA logo


“Best Paper Award”

“Best Young Entrepreneur Award”

Both awards will be TeslaTM K20 GPU Accelerators, sponsored by NVIDIA

Relaxing, ERSA12

ERSA’12 Greetings

In The Pub

Relaxing after the conference

ERSA’12 Programme

ERSA’12 Schedule in pdf

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ERSA Conference was founded in 2001 and has been an important part of WORLDCOMP conferences in Las Vegas

The last ERSA conference with WORLDCOMP was in 2013

Read more from ERSA statistics

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The authors have no restrictions to use their ERSA papers.

However, when they do post their articles, they must acknowledge the publication by adding the following text.

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Making references to ERSA papers

To refer to (cite) ERSA Conference Proceedings or any particular paper/article in this publication, the following style should be used:

ERSA Publication Statistics

Year range: 2000 - 2010: Publications: 417 Citations: 1,247 statistics text

ERSA publication statistics

Provided by Microsoft Academic Search

Visit Microsoft Academic

ERSA Indexing

The proceedings of the ERSA Conference have been approved, by the evaluation board of science citation index (SCI) databases, for indexing, integrating, and inclusion into Elsevier indexing databases (Elsevier indexing databases include, among others: Scopus, www.info.scopus.com; SCI Compendex, Engineering Village, www.ei.org; EMBASE, www.info.embase.com; and others)

In addition, the ERSA proceedings will be indexed in science citation databases that track citation frequency/data for each published paper. Science citation databases include: Inspec / IET / The Institute for Engineering & Technology; The French National Center for Scientific Research, CNRS, INIST databases, PASCAL (accessable from INIST, Datastar, Dialog, EBSCO, OVID, Questel.Orbit, Qwam, & STN International); and others.

ERSA Acronyms

There are 15 different meanings of ERSA.

Do not confuse if you search from WEB. Several conferences and organizations call themselves ERSA. ERSA, meaning Engineering of Reconfigurable Systems and Algorithms has the highest ranking. Visit Abbreviations and Acronyms Dictionary for ERSA.

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Engineering of Reconfigurable Systems and Algorithms (conference)



Employer Retirement Savings Account



En Route Supplement Australia (aviation)



Ernst Sachs



Economic Research Southern Africa (National Treasury of South Africa)



Equity Release Solicitors Alliance



Employee Retirement Savings Account



Emergency Roadside Assistance



Enhanced Regional Situational Awareness



Eric Sadek (founder of ERSA Group)



Extended Runway Safety Area



Equal Resource-Sharing Allocation



Estudios de la Realidad Social Argentina (high-school subject in Argentina)



European Regional Science Association



Electronic Research Supply Agency (US Navy)


Prior ERSA Keynote Speakers

Opening, ERSA10

  • Prof. David Lorge Parnas, Middle Road Software, Inc, Canada
  • Prof. Eugene Howard Spafford, Purdue University, USA
  • Prof. Michael J. Flynn, Stanford University, USA
  • Prof. Viktor Prasanna, Univ. of Southern California, USA
  • Prof. Stephen Brown, University of Toronto & Altera, Canada,
  • Prof. Donald W. Bouldin, Univ. of Tennessee, Knoxville, USA
  • Prof. Seth C. Goldstein, Carnegie Mellon University, USA
  • Prof. Walid A. Najjar, Univ. of California, Riverside, USA
  • Prof. Wayne Luk, Imperial College, UK
  • Prof. Hideharu Amano, Keio University, Japan
  • Prof. Lionel Torres, University of Montpellier 2, France
  • Prof. Dominique Lavenier, IRISA, Rennes, France
  • Prof. Jörg Henkel, Karlsruhe Institute of Technology, Germany
  • Dr. José L. Muñoz, Deputy Director, National Science Foundation (NSF), USA
  • Jon Huppenthal, President and CEO of SRC Computers, USA
  • Chris Rowen, Ph.D. President and CEO, Tensilica, Inc., USA
  • Chris Eddington, Synplicity, Inc. USA
  • Chris Phillips, VP of Engineering, ElementCXI, Milpitas, CA, USA
  • Tony Brewer, CTO, Convey Computer
  • Charle' R. Rupp, Ph.D., Chief Architect, Stretch, Inc., USA
  • Alessandro Forin, Microsoft Research
  • R. Kent Koeninger, CEO of Veritomics, Inc.
  • Robert P. Colwell, PhD, Independent Consultant, USA
  • Dr. Nick Tredennick, Gilder Technology Report, USA
  • Steve Leibson, Technology Evangelist, Tensilica, Inc., USA

Partial list of ERSA/WORLDCOMP Past Sponsors

  • Altera
  • Solarflare
  • Nvidia
  • Pico Computing
  • Impulse
  • Microsoft Research
  • Element CXI
  • Synplicity
  • Intel
  • SuperMicro
  • Salford Systems
  • Google
  • High Performance Computing for Nanotechnology (HPCNano)
  • International Society of Intelligent Biological Medicine
  • University of California, Berkeley, USA
  • Massachusetts Institute of Technology (MIT)
  • University of Texas at Austin, Austin, Texas, USA
  • University of Siegen, Germany
  • UMIT, Institute of Bioinformatics and Translational Research, Austria
  • SECLAB of University of Naples Federico II
  • University of Naples Parthenope, & Second University of Naples, Italy

ERSA Global Representation

Lunch time, ERSA11

  • Over 30 countries have been represented at ERSA conference, including:

    USA, Canada, Brazil, UK, Germany, France, Italy, Spain, Portugal, Belgium, Netherlands, Austria, Sweden, Norway, Finland, Greece, Japan, South Korea, China, India, Taiwan, Australia, New Zeeland, Malaysia, etc,

  • WorldComp global representation: over 80 countries

  • WorldComp attendance: over 2000 attendees

  • ERSA market penetration: 50,000 - 60,000 email recipients. ERSA uses various email lists and professional networks SemiWiki and LinkedIn


Featured Sections

ERSA’13 Programme Outline

Partial list of presentations

ERSA’13 Schedule.

For full list of presentations download the ERSA13 Schedule in pdf format

ERSA-NVIDIA Award Nominees

“Best Young Entrepreneur”

  • Ahmed Hassan, Mohammed Gouda,
    Kashef, Egypt, iITC, Sweden

    “Bastet” Subsurface Detection Air Vehicle
  • Manal K. Jalloul
    American University of Beirut, Lebanon

    A Novel Parallel Computing Approach for Motion Estimation Based on Particle Swarm Optimization

ERSA’13 Invited Talk

  • Addressing the Challenges of Hardware Assurance in Reconfigurable Systems
    William H. Robinson, Trey Reece, Nihaar N. Mahatmem
    Vanderbilt University, Nashville, TN, USA

Communication Techniques in ReconFigurable Systems

Communication Techniques in ReconFigurable Systems
Chair: Qian Zhao, Kumamoto University, Japan

  • An Area-Efficient Asynchronous FPGA Architecture for Handshake-Component-Based Design
    Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama
    Tohoku University, Japan
  • Implementing Alamouting 2x1 Transmit Diversity on Software Defined Radios
    Anaam Ansari and Robert Morelos Zaragoza
    San Jose State University, California, USA

Developing Reconfigurable Heterogeneous Systems

Developing Reconfigurable Heterogeneous Systems
Chair: Prof. William H Robinson, Vanderbilt Univ. USA

  • Heuristically Driven Task Agglomeration in Limited Resource Partially Reconfigurable Systems
    David Austin and B. Earl Wells
    University of Alabama in Huntsville, Alabama, USA
  • An Automatic Design and Implementation Framework for Reconfigurable Logic IP Core
    Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, and Toshinori Sueyoshi
    Graduate School of Science and Technology, Kumamoto University, Japan

OpenCL for FPGAs

Read more about OpenCL and High-Level Synthesis for FPGAs;

Altera Corporation has a development program focused on the Open Computing Language (OpenCL™) standard for FPGAs and SoC FPGAs. Altera's OpenCL program combines the parallel performance capability of FPGAs with the OpenCL standard to enable powerful system acceleration.

Hardware acceleration using FPGAs has shown orders of magnitude reduction in runtime of computationally-intensive applications in comparison to traditional stand-alone computers. This is possible because on an FPGA many com- putations can be performed at the same time in a truly- parallel fashion.

They have been successfully used to accelerate computation in network packet processing, medical imaging, molecular dynamics and in many other fields in comparison to workstation computers.


OpenCL for FPGAs: Prototyping a Compiler
Prof. Stephen Brown, University of Toronto & Altera, Canada
ERSA’12 Conference

Open the paper

Stream Computing

Read some papers from “Application Developer News”

These papers deal with Data Flow based computing. In early seventies the Flow-Based Programming was invented by Paul Morrison and was used in financial sector over long period. Now, in the context of Big Data and hardware accelerators using Field Programmable Gate Arrays, the same concept of data flow are used for hardware design.


Flow-Based Programming
J. Paul Morrison, J.P. Morrison Enterprises Ltd., Unionville, Ontario, Canada
ADN Journal, Issue 1

Open the paper

High Level Design of Hardware-based, Low-Latency Filters for “Big Data”.
Brian Durwood and Edward Trexel of Impulse Accelerated Technologies Inc. & Alan Coppola of OptNgn Software
ADN Journal, Issue 1

Open the paper

Prof David Lorge Parnas
“How Engineering Mathematics can Improve Software”


For many decades computer science researchers have promised that the "Formal Methods" developed by computer scientists would bring about a drastic improvement in the quality and cost of software. That improvement has not materialized. We review the reasons for this failure....

Paper Slides

International Journal & Gathering for Application Developers

ERSA-ADN brings a new emphasis to the commercial and industrial challenges in preparing commercial applications for systems using complex, reconfigurable heterogeneous technology

Alan Coppola

Dr. Alan Coppola

Principal, OptNgn Software, USA

Alan Coppola has spent the last few years working on FPGA acceleration of large scale R-language Bayesian Markov Chain Monte Carlo simulation applications, and on computer vision applications involving in-video search for image-objects and augmented reality mobile applications.

Bernard Pottier

Prof. Bernard Pottier

Univ. of Bretagne Occidentale, France

Bernard Pottier has been an early actor in reconfigurable computing with the design of a multiprocessor embedding an FPGA ring, and high level tools to program this machine.

Later he explores heterogeneous reconfigurable systems and their related programming methods.

Michael Flynn

Prof. Michael Flynn

Stanford University, USA

Co Founder, Senior Advisor, Maxeler Technologies Inc.


Co Founder, Senior Advisor,
Palyn Associates

Steve Casselman

Mr. Steve Casselman

Principal Engineer at Altera Corporation, USA

CEO at Comma Corporation, DRC Computer


CTO and Founder, DRC Computer

President and CEO, Virtual Computer Corporation (VCC)

Ty Garibay

Mr. Ty Garibay

VP of Embedded Processing at Altera, USA

Microprocessor Design, Digital IP design


Senior Director of IC Engineering, OMAP Business Unit, Texas Instruments

Director of Worldwide Digital IP Development, WTBU, TI Wireless

ARM Core Manager, TI Wireless

Yousef Shemisa

Mr. Yousef Shemisa

CTO, Accurate Always, USA

Aerospace and Defense

Simon See

Prof. Simon See

Director at Nvidia, Singapore
Professor of Shanghai Jiao Tong University, China

Lead and managed Pre-sales Team
Research and Development management
Consulting team management

Lindsay Black

Mr. Lindsay M Black, MIET, MIEEE, UK

IT & Technical Solution Sales

Fujitsu UK and Ireland, SGI, Sun Microsystems Ltd

Technically qualified Sales Professional who specializes in large scale computing, storage, software and service solutions in to Government, Aerospace & Defence and many commercial sectors including Manufacturing, Oil & Gas, Financial Services and Life Sciences etc

Brian Durwood

Mr. Brian Durwood

CEO at Impulse Accelerated Technologies

Co-founded and run a software company making high performance parallelizing software.

Impulse C enables communications, imaging, bio, financial, Federal and other developers to quickly accelerate C-based algorithms in grid, cloud or local FPGA hardware.

Jaime Cummins

Mr. Jaime Cummins

President and CEO at Pico Computing

Founder and CEO of Edison Labs

Developing custom solutions based on Reconfigurable devices for the embedded, cryptographic, security, HPC and the BioComputing.

Developing Mobile Technology for IPTV, streaming media, Scaling Virtual Reality, Mobile Communications

John Swan

Mr. John Swan

EDATechForce, LLC , IEEE - Computer Society

EDPS Chair/Liason, Santa Clara Valley CS, IEEE

Product Marketing and Business Development
Interface with top SoC and SoFPGA design teams to represent several IC/SoC Design Solutions
Over 15 years of SoC design and methodology from requirements through layout.

Daniel Nenni

Mr. Daniel Nenni

Founder at The Semiconductor Wiki Project

Expert at Strategic Foundry Relationships

Daniel has worked in Silicon Valley for the past 25 years with computer manufacturers, electronic design automation software, and semiconductor intellectual property companies.

Dr Eric Stahlberg

Dr. Eric Stahlberg

President, OpenFPGA,
Organization for creation of application development standards for field programmable gate arrays

Director - Bioinformatics at SAIC-Frederick

Direct bioinformatics core group providing analysis support for the National Cancer Institute - Center for Cancer Research, Bethesda, MD

Dr. Steven Guccione

Dr. Steven Guccione

VP Senior Technology Manager,
Bank of America, USA

High Performance Computing (HPC) software and architecture for reconfigurable, multicore and GPU systems.

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Reconfigurable Las Vegas

Conference Chair
Dr Toomas P Plaks

Contact the Chair

LinkedIn connection requests welcome

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