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Weekly Update
Wednesday, May 14, 2014

Developer Newsletter

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Call for technical communities to submit:

Regular Technical and Research Papers

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Hot Topics:

Heterogeneous Systems Architecture

High Level Design Tools

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Defence, Military and Space Applications

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Hardware Support for Internet and Security

Application in Automotive Industry, Autotainment

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Application Developer News - ADN

The Journal for
Developers of Heterogeneous Computing Systems

Call for Contributions


30% discount for research and technical papers

More discounts for Emerging Economy Countries

Various discounts available for Sponsorship


For Details, contact the ADN EiC, Toomas P Plaks

Can FPGAs win market share as processors?

LinkedIn Discussion

Brian: The appeal of today‘s FPGAs as alternatives to processors is compelling.

Reiner: The massive power inefficiency caused by von Neumann syndrome is an important reason to look for the speed-up factors and energy saving factors.

Jeremy: The real problem is that in some application areas the designs have been dictated by software people

Joan: FPGAs cannot run an OS (unless with a soft processor) therefore don't fit for tablets, computers and ...

Read more comments from experts.

FPGA Users & High Performance Computing Enthusiasts in LinkedIn



Google+ Community

Transarithmetic is total - it has no exceptions, such as division by zero - so, in the right architecture, it can guarantee that pipelines never break and that all syntactically correct code is semantically correct - i.e. does not crash. It doubles the range of real numbers encoded by IEEE 754 floating-point numbers and removes the weird number from two's complement. Transmathematics gets a bit more complicated.

Transmathematica is a new Google+ Community that discusses transmathematics. Drop by and ask a question to get discussion going.

Go to Transmathematica

News from World

Open Source Hardware

Facebook, Fidelity, Goldman Sachs, and other leading IT users think the open source movement is ready to shake up the hardware industry the way Linux did in software. In the past, only the very biggest companies -- the likes of Amazon, Google, and, yes, Facebook -- could afford to customize servers, storage, and networking systems to their precise needs. Instead, most companies have filled their datacenters with off-the-shelf, mass-produced hardware from the likes of Hewlett-Packard, IBM, Dell, Cisco, and Oracle.

But an open source initiative called the Open Compute Project is trying to upend this hardware production process in two ways simultaneously. First, Facebook and other companies are sharing their hardware designs through OCP. Such sharing could put leading-edge designs in the hands of many more user companies. Second, shared hardware specs let IT organizations mix and match parts from different suppliers, which opens hardware manufacturing to new players. As a result, open source hardware could produce significant new competition for existing hardware vendors -- and a new bargaining chip for buyers.

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Optimizing embedded software for power efficiency: Part 1 - measuring power

One of the most important considerations in the product lifecycle of an embedded project is to understand and optimize the power consumption of the device. Power consumption is highly visible for hand-held devices which require battery power to be able to guarantee certain minimum usage/idle times between recharging. Other embedded applications, such as medical equipment, test, measurement, media, and wireless base stations, are very sensitive to power as well -- due to the need to manage the heat dissipation of increasingly powerful processors, power supply cost, and energy consumption cost -- so the fact is that power consumption cannot be overlooked.

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No God In The Machine

Computers might be able to do remarkable things, but new research offers mathematical proof that they cannot replicate human consciousness.

In a recently published paper, “Is Consciousness Computable? Quantifying Integrated Information Using Algorithmic Information Theory,” Phil Maguire, co-director of the BSc degree in computational thinking at National University of Ireland, Maynooth, and his co-authors demonstrate that, within the model of consciousness proposed by Giulio Tononi, the integrated information in our brains cannot be modeled by computers.

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Splunk Extends Analysis To NoSQL Databases

Splunk Enterprise gets multisite support, improved visualization. Hunk adds analysis for Accumulo, Cassandra, MongoDB, and Neo4j.

Splunk keeps rolling along, well ahead of an open-source threat that some thought might flatten it. The company last week sprinted ahead yet again, introducing advances to its Splunk Enterprise flagship product and Hunk platform for Hadoop, both of which are designed to “search, monitor, analyze, and visualize machine-generated big data.”

Splunk is a successful commercial vendor thriving in a big data market that is otherwise dominated by open-source products including Hadoop and various NoSQL databses. Splunk’s “search” capabilities include algorithms for clickstream analytics, machine-data analysis, IT operational analytics, risk analysis, and customer-service usage and patterns of behavior.

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Optimizing embedded software for power efficiency: Part 2 - Minimizing hardware power

Data flow optimization focuses on working to minimize the power cost of utilizing different memories, buses, and peripherals where data can be stored or transmitted by taking advantage of relevant features and concepts. Algorithmic optimization refers to making changes in code to affect how the cores process data, such as how instructions or loops are handled.

Hardware optimization, as discussed here, focuses more on how to optimize clock control and power features provided in the microprocessor or peripheral circuits.

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Optimizing embedded software for power efficiency: Part 3 - Optimizing data flow and memory

Because clocks in an embedded system design have to be activated not only in the core components, but also in buses and memory cells, memory-related functionality can be quite power-hungry, but luckily memory access and data paths can also be optimized to reduce power.

Common practice is to optimize memory in order to maximize the locality of critical or heavily used data and code by placing as much in cache as possible. Cache misses incur not only core stall penalties, but also power penalties as more bus activity is needed, and higher-level memories (internal device SRAM, or external device DDR) are activated and consume power. As a rule, access to higher-level memory such as DDR is not as common as internal memory accesses, so high-level memory accesses are easier to plan, and thus optimize.

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Optimizing embedded software for power efficiency: Part 4 - Peripheral and algorithmic optimization

When considering the impact of reading and writing of data has on an embedded system’s power utilization we cannot just think about memory access: we need to pull data into and out of the device as well. Here we will we will look at how to minimize power consumption in commonly used embedded processor (I/O) peripherals. Later we will talk about the various algorithmic techniques for power management.

On the first topic, things to consider include the peripheral’s burst size, speed grade, transfer width, and general communication modes. The main standard forms of peripheral communication for embedded processors include DMA (direct memory access), SRIO (serial rapid I/O), Ethernet, PCI Express, and RF antenna interfaces. I2C and UART are also commonly used, though mostly for initialization and debug purposes.

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Report: Apple to Finally Add Split-Screen Multitasking to iPad with iOS 8

When the iPad was first announced, many in the tech industry mocked it. Some jokingly referring to it as a “Maxipad,” others decried that it was simply a supersized iPod touch, and many saw the iPad as simply a “consumption” device. Over the past four years, the iPad has gone on to be a huge success for Apple, but there have still been lingering questions about the usefulness of the device for people that actually want to do “real work.”

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Read More World News

ADN Journal, Technical Papers

  • Embedded Processor Selection Using FPGA-based Profiling
    Fadi Obeidat* and Robert H. Klenke**
    * Intel Corporation, Austin, TX, USA
    ** Virginia Commonwealth University, Virginia, USA

    ADN Journal, Issue 2

    In embedded systems, modeling the performance of off-the-shelf processors is very important to enable the designer to estimate the capability of each candidate processor against the target application. Considering the large number of available embedded processors, the need has increased for building an infrastructure by which it is possible to estimate the performance of a given application on a certain processor with a minimum of time and resources. This paper presents the use a Xilinx MicroBlaze softcore processor ...

    Fadi Obeidat, Embedded Processor Selection...

Back to Contents

Technical Info for ADN Contributors

Bullet Types of Advertisings

There are three main options for advertising.

  • Company or Event Logo plus link to Company or Event web-site
  • Company or Event Banner (with link to website), it can be an animated GIF, but animation not required
  • Company Logo or Banner (with link to website) plus Company or Event Info (half page + one image)

Logos are usually displayed on the left bar of the website and journal. Banners are usually horizontal graphical blocks (in some cases we accept vertical banners) and displayed at the bottom or middle area of the webpage and journal.

Advertisements are displayed on a separate webpage with its own URL and are supported by LinkedIn button. See for example Velocytech webpage with ERSA/ADN.

Advertising are sold for one month, three months and for whole year.

Only commercial advertising will be charged. Advertising of upcoming events, seminars, conferences, webinars, etc are free.

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Bullet Submission

Email submission

Currently, you have to email your technical paper (short or full-size) to in PDF format. In case of advertisements, you have to send the Logo or Banner as a separate file, text of advertisement as a PDF file.

On the subject line, you have to specify that this is a submission for Application Developer Journal, and the name of corresponding author:

Application Developer Journal, [first name, family name]

In the body, please include the title of the paper, names of authors and corresponding author.

Cover Letter

Each submission must include a cover letter as a separate .txt file and containing the following information:

  • the title of paper
  • authors with their affiliations
  • contacting author's name, full postal address, e-mail address, telephone number
  • type of paper: full paper, short paper
  • 3 to 6 topical keywords that would best represent the content of the paper

For further details, contact the EiC, Toomas P Plaks.

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Bullet Publishing on Web site

Publishing on a separate webpage with LinkedIn button

All contributions to the ADN journal in a form of text (i.e. not merely Logos), including advertisings and short papers, are displayed on a separate webpage with its own URL and are supported by LinkedIn button. This offers authors and visitors the possibility to post the contribution to LinkedIn groups and to forward to other individuals. In this way, authors and their contributions will be benefited with higher visibility.

Application Developer News - ADN

The Journal for
Developers of Heterogeneous Computing Systems

The Application Developer News - ADN is a Journal for industrial and academic researchers, entrepreneurs, and developers. It offers peer-reviewed, rapid-decision publishing, focusing on commercial application development for heterogeneous, reconfigurable, embedded computing systems. The journal will be published monthly. Read the Editorial Message and more about the Scope.

Developer Newsletter is a weekly update of news for Developers of Heterogeneous Computing Systems. It is published on every Wednesday, distributed freely by email and is available on Application Developer News website .

Editorial Board

ADN will draw on technical communities for peer reviewers to ensure the best possible papers are being published.

If you are interested to be an editor, please contact with the EiC, Toomas P Plaks.

ERSA & ADN Chair
Dr. Toomas P Plaks, London, UK

Contact the EiC,
Toomas P Plaks

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