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Weekly Update
Wednesday, September 03, 2014

Developer Newsletter

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for Contributions

Call for technical communities to submit:

Bullet Regular Technical and Research Papers

Bullet Proposals for Special Issues

Visit Call for Papers and Special Issues

Hot Topics:

Bullet Heterogeneous Systems Architecture

Bullet High Level Design Tools

Bullet Embedded Systems

Bullet Defence, Military and Space Applications

Bullet Mobile Computing Systems

Bullet Cloud Computing and Networking

Bullet Internet of Things and Wearables

Bullet Internet Security, Cryptography

Bullet Application in Automotive Industry, Autotainment

Bullet Bio-sciences, Bio-informatics, Medical Systems

Bullet HPC in Finance and Banking, Big Data

Bullet And More

Special Offer

Bullet 30% Discount
Full Size Technical Papers

Various discounts for non-profit organisations

Bullet Short Technical Papers

Bullet Advertising

Contact the EiC, Toomas P Plaks

ERSA-ADN Partners & Sponsors

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Bullet Please forward the Newsletter to your colleagues and interested parties

Application Developer News - ADN

The Journal for
Developers of Heterogeneous Computing Systems

Call for Contributions

Discounts

30% discount for research and technical papers

More discounts for Emerging Economy Countries

Various discounts available for Sponsorship

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For Details, contact the ADN EiC, Toomas P Plaks

News from World

No particular order

Intilop Releases 16K Concurrent-TCP-Session Hardware Accelerator Verified and Tested on Xilinx Virtex-7 FPGA VC707 Evaluation Kit

Intilop, Inc. a pioneer, most respected and recognized leader in providing Ultra-Low latency and Hyper Performance Complex Networking Protocol Accelerators, Mega IP Cores, Systems and Solutions, has released a 16K concurrent-TCP-session Hardware Accelerator Verified on a Virtex®-7 FPGA VC707 Evaluation Kit This deployment ready with pre-ported and verified 10G TCP Accelerator (TCP Full Offload Engines) that implement from 2 to 16 Thousand Simultaneous TCP Connections, unlimited continuous connections and Bandwidth of more than 1.1 Gigabyte/sec per port regardless of number of simultaneous or active TCP Sessions.

The FPGA platform offers an ‘Out of the box’ working TCP hardware stacks with unprecedented functionality, ultra small core size, high performance and flexibility. The Full TCP core runs without any CPU involvement through all stages of TCP transactions, including connection set up, data transfer, tcp-retries and connection tear down. The TCP connections maintain the same high throughput and low latency/processing times regardless of number of simultaneous connections in progress.

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Multi-Core FFT Performance on Intel(r) Sandy Bridge Processors

This paper examines scalability of computational performance with the Intel(r) Sandy Bridge multicore architecture, particularly when used on Mercury processor boards.

We look specifically at two device types, an 8-core Xeon (E5-2648L clocked at 1.8 GHz) and a 4-core Core i7 (2715QE clocked at 2.1 GHz). These are relatively low-power devices which are suitable for use on embedded processor boards. The algorithm of interest is a complex FFT (fft_copx) from the Mercury MathPack library, which represents the numerically intensive processing requirements typical of many embedded signal processing systems. One question to be addressed is whether there is a falloff in performance as the FFT algorithm is run on one or more cores of the same device simultaneously. Even though the cores are independent and have their own L1 and L2 cache, they share access to an L3 cache and to the DRAM memory controller. As the FFT size increases from 1K (1024 points) to 1M (1,048,576 points), demands on the memory subsystem increase as the cores compete for this limited resource.

This means that for some applications, you cannot simply measure the timing on a single core, and then scale the results to size your system - the falloff in performance as all cores are utilized must be taken into account.

Read More forward

  • A map of every connected device on Earth
  • Performance Comparison Between Intel(r) Mobile-Class and Server-Class Processors for Embedded Defense Applications

Read more from ADN website forward

Back to Contents

Internet of Things: Applications

No particular order

Internet Of Things = Internet Of Gateways

The advent of the IoT will mean monitoring an explosion of gateways and will require increased network performance monitoring — in particular, application-aware network monitoring.

The last mile of the Internet of things (IoT) may be enabled by yet another new specification, Thread.

Thread uses little power. It’s a feature by design, but low-power endpoints aren’t really Internet endpoints.

There needs to be some way to make a bridge, even to the relatively enormous energies of WiFi. And that would seem to confirm a growing suspicion that the IoT is really going to be an Internet of gateways.

Read More forward

  • Computers That Know What You Need, Before You Ask
  • 5 challenges of IoT connectivity
  • Embedded Systems and The Internet of Things — What’s Under the Hood?
  • Keeping Up With the Internet of Things (Industry Perspective)
  • The Internet of Things Will Thrive On Energy Efficiency
  • Beyond the Tower of Babel: From Internet of Things to the Connected Society
  • The Internet of Things and energy conservation

Read more from ADN website forward

Back to Contents

Internet of Things: Technology & Development

No particular order

Internet of things startup Octoblu designs a platform that translates protocols

While big companies are working hard to impose standards on the burgeoning Internet of things (IoT), little Octoblu is willing to be the translator between whatever protocols to connect every thing with every other thing.

Octoblu came out of stealth mode today with a focus on the industrial side of the IoT. Its core product is the Meshblu platform that, according to a statement, “can be used for the discovery, control and management of any API [application performance interface]-based software application, any hardware or appliance, or social media network.”

Read More forward

Intel and other gadget makers create a standards body for the Internet of things

The Open Interconnect Consortium wants to deliver an open-source specification for wirelessly connecting devices. The members include Atmel, Broadcom, Dell, Intel, Samsung, and Intel’s Wind River embedded-software division. The group seeks to accelerate the development of the Internet of things.

The Open Interconnect Consortium’s first open-source code will target smart homes and office solutions.

The consortium will compete the AllSeen alliance, which includes Qualcomm, LG, Panasonic, Sharp, and Microsoft. From what I hear, there’s a rift in the industry over who will own the intellectual property related to the communications.

Read More forward

  • Internet of Things: Security For A World Of Ubiquitous Computing
  • The Internet Of Small Things Spurs Big Business
  • Devices in the Cloud: Driving Intelligence Where You Need It
  • Internet of Things Done Wrong Stifles Innovation
  • The internet of things (to be hacked)

Read more from ADN website forward

Back to Contents

Technical Info for ADN Contributors

Bullet Types of Advertisings

There are three main options for advertising.

  • Company or Event Logo plus link to Company or Event web-site
  • Company or Event Banner (with link to website), it can be an animated GIF, but animation not required
  • Company Logo or Banner (with link to website) plus Company or Event Info (half page + one image)

Logos are usually displayed on the left bar of the website and journal. Banners are usually horizontal graphical blocks (in some cases we accept vertical banners) and displayed at the bottom or middle area of the webpage and journal.

Advertisements are displayed on a separate webpage with its own URL and are supported by LinkedIn button. See for example Velocytech webpage with ERSA/ADN.

Advertising are sold for one month, three months and for whole year.

Only commercial advertising will be charged. Advertising of upcoming events, seminars, conferences, webinars, etc are free.

Read More forward

Bullet Submission

Email submission

Currently, you have to email your technical paper (short or full-size) to sub@ersaconf.org in PDF format. In case of advertisements, you have to send the Logo or Banner as a separate file, text of advertisement as a PDF file.

On the subject line, you have to specify that this is a submission for Application Developer Journal, and the name of corresponding author:

SUBJECT LINE:
Application Developer Journal, [first name, family name]

In the body, please include the title of the paper, names of authors and corresponding author.

Cover Letter

Each submission must include a cover letter as a separate .txt file and containing the following information:

  • the title of paper
  • authors with their affiliations
  • contacting author's name, full postal address, e-mail address, telephone number
  • type of paper: full paper, short paper
  • 3 to 6 topical keywords that would best represent the content of the paper

For further details, contact the EiC, Toomas P Plaks.

Read More forward

Bullet Publishing on Web site

Publishing on a separate webpage with LinkedIn button

All contributions to the ADN journal in a form of text (i.e. not merely Logos), including advertisings and short papers, are displayed on a separate webpage with its own URL and are supported by LinkedIn button. This offers authors and visitors the possibility to post the contribution to LinkedIn groups and to forward to other individuals. In this way, authors and their contributions will be benefited with higher visibility.

Application Developer News - ADN

The Journal for
Developers of Heterogeneous Computing Systems

The Application Developer News - ADN is a Journal for industrial and academic researchers, entrepreneurs, and developers. It offers peer-reviewed, rapid-decision publishing, focusing on commercial application development for heterogeneous, reconfigurable, embedded computing systems. The journal will be published monthly. Read the Editorial Message and more about the Scope.

Developer Newsletter is a weekly update of news for Developers of Heterogeneous Computing Systems. It is published on every Wednesday, distributed freely by email and is available on Application Developer News website .

Editorial Board

ADN will draw on technical communities for peer reviewers to ensure the best possible papers are being published.

If you are interested to be an editor, please contact with the EiC, Toomas P Plaks.

ERSA & ADN Chair
Dr. Toomas P Plaks, London, UK

Contact the EiC,
Toomas P Plaks

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