ERSA’11 PROGRAMME

ERSA INVITED TALK

Dirk Stroobandt
How Parameterizable Run-time FPGA- Reconfiguration can Benefit Adaptive Embedded Systems,
Dirk Stroobandt, Karel Bruneel
Ghent University, Belgium

Time: 11:00 - 11:20am
Location: Gold Room

Abstract:

In this presentation, we assume that runtime adaptive embedded systems have proven benefits over static implementations and we ask ourselves how such an adaptive system could be implemented. It is clear that the system adaptation should be done very fast so that the overhead of adapting the system does not overshadow the benefits obtained by the adaptivity. In this presentation, we propose a methodology for FPGA design that allows a fast reconfiguration for dynamic datafolding applications. Dynamic Data Folding (DDF) is a technique to dynamically specialize an FPGA configuration according to the values of a set of parameters. The general idea of DDF is that each time the parameter values change, the device is reconfigured with a configuration that is specialized for the new parameter values. Since specialized configurations are smaller and faster than their generic counterpart, the hope is that their corresponding system implementation will be more cost efficient. In this presentation, we show that DDF can be implemented on current commercial FPGAs by using the parameterizable run-time reconfiguration methodology. This methodology comprises a tool flow that automatically transforms DDF applications to a runtime adaptive implementation. The tool flow consists of two parts. The offline (static) tool flow optimizes FPGA configurations with the standard FPGA implementation steps (synthesis, technology mapping, placement and routing) but taking care of the parameters in a propoer way. The online (runtime) toolflow takes the result of the static tool flow, evaluates the reconfiguration procedure for the current value of the parameters and (partially) reconfigures the device (automatically). Experimental results with this tool flow show that we can reap the benefits (smaller area and faster clocks) without too much reconfiguration overhead.

Bio:

Dirk Stroobandt graduated in 1994 and obtained the Ph.D. degree in 1998 in electrotechnical engineering from Ghent University, Belgium. Until 2002 he was post-doctoral fellow with the Fund for Scientific Research - Flanders (Belgium) (F.W.O.) and and 2002 he was appointed professor at Ghent University, affiliated with the Department of Electronics and Information Systems (ELIS), Computer Systems Lab (CSL). He currently leads the research group HES of about 10 people with interests in semi-automatic hardware design methodologies and tools, run-time reconfiguration, and reconfigurable multiprocessor networks. Dirk Stroobandt is the inaugural winner of the ACM/SIGDA Outstanding Doctoral Thesis Award in Design Automation (1999) and received the `Scientific prize Alcatel Bell' for his work in 2002. Dirk Stroobandt visited the lab of Prof. Fadi J. Kurdahi at UCI (1997) and also the group of Andrew B. Khang at UCLA for a year as a post-doctoral researcher (1999-2000). Dirk Stroobandt initiated and co-organized the International Workshop on System-Level Interconnect Prediction (SLIP) in 1999 and is still actively involved in this workshop. He is guest editor of two special issues of the IEEE Transactions on VLSI Systems on System-Level Interconnect Prediction and a special issue on SLIP for Integration, the VLSI Journal. He was also associate editor of ACM's TODAES.