ERSA’10 Conference Call for Papers
CALL FOR LATE PAPERS: June 10, 2010
Call for Late Papers, Posters, Student Papers and Demos/Exhibitions
Submissions accepted in short paper and poster format, visit Submission.
If accepted, papers will be published in the Final Edition of the ERSA'10
Conference Proceedings which will go to press soon after the conference.
It is the Final Edition of the proceedings which will be sent to libraries, marketed, sent for indexing consideration, ...
Important Dates for LATE SUBMISSION:
Paper Submission: June 10, 2010
Notification: June 15, 2010
Registration: June 21, 2010
Camera-Ready Papers: June 21, 2010
The 2010 International Conference on
ENGINEERING OF RECONFIGURABLE SYSTEMS AND ALGORITHMS - ERSA'10
July 12-15, 2010, Monte Carlo Resort, Las Vegas, Nevada, USA
ERSA'10 Web page:
Call for Proposals for Technical Sessions, Tutorials, Demos/Exhibs, Sponsorships
ERSA conference focuses on different approaches in engineering of reconfigurable
computing systems: in hardware design and in implementing of algorithms; including
theory, architecture, algorithms, design systems and applications that demonstrate
the benefits of reconfigurable computing.
Proposals for Technical Sessions: Feb. 15, 2010
Paper Submission: March 15, 2010
Notification: April 16, 2010
Final Papers: May 5, 2010
Topics of interest include but are not limited to:
Theory - Synthesis, Mapping, Parallelization, Partitioning...
Software - CAD, Languages, Compilers, Operating Systems...
Hardware - Adaptive and Dynamic Hardware, Reconfigurable Architectures...
Applications - Mobile Computing, Automotive Industry, Smart Cameras...
Reconfigurable and Evolvable Hardware Architecture
Parallelism and Reconfigurable Multi-Core Systems
Dynamic Partial Runtime Reconfiguration
Design Tools, Design Flow , Dynamic Architectures, Scheduling
Runtime Resource Management: Processes, Processors And Communication
Energy-Efficient Reconfigurable Mobile Systems
Applications, Embedded Systems, Security, Image And Signal Processing
ERSA conference will be composed of research presentations, keynote lectures,
invited presentations, tutorials, panel discussions, and poster presentations.
ERSA Conference accepts full papers in the following Categories:
Invited talks and distinguished papers
10 pages in IEEE paper format. Oral presentation time is 30 min.
7 pages in IEEE paper format. Oral presentation time is 20 min.
4 pages in IEEE paper format. Only poster presentation
There will be a poster session (for ongoing not finished work, etc.) with
simplified review process. Authors of posters have to submit an extended abstract
of no more than 4 pages. Submission is open up to the conference beginning. Only
For more details visit section Submission
Proposals for Demos/Exhibs
ERSA provides flexible arrangements for Industrial Sponsors for Demos, Exhibitions, Presentations and Tutorials etc.
Interested parties should contact ERSA Chairman Toomas Plaks
WORLDCOMP Keynotes from ERSA
President and CEO of SRC Computers, Colorado Springs, USA
Prof. Roger Chamberlain
Washington University in St. Louis, USA
Prof. Russell Tessier
University of Massachusetts, USA
Prof. John Villasenor
University of California, Los Angeles, USA
Invited Panel Sessions:
Invited panel session consists of three parts:
Invited paper presentations
Regular session that relates to the panel session topics, open submission.
Signal-Image Processing and Dynamic Partial Reconfiguration
Ronald F. DeMara and Jooheung Lee
School of Electrical Engineering and Computer Science
University of Central Florida, USA
Prof. John Villasenor, University of California, Los Angeles, USA
Prof. Vijaykrishnan Narayanan, The Pennsylvania State University, USA
Prof. Ann Gordon-Ross, University of Florida, USA
Reconfigurable Supercomputing: Performance, Productivity, and Sustainability
Herman Lam and Greg Stitt
University of Florida, USA
Prof. Roger Chamberlain, Washington University in St. Louis, USA
Eric Stahlberg, OpenFPGA
Kent Koeninger, CEO of Veritomics, Greater Boston Area, USA
Jon Huppenthal, President and CEO of SRC
Processor Customization for Reconfigurable Fabrics
David Andrews* and Christian Plessl**
* Univ. of Kansas, USA
** Paderborn Center for Parallel Computing
University of Paderborn, Germany
For more details, visit ERSA website:
Dr Toomas P Plaks