ADN Issue 8, July 2014


the end

Most Visited

Here is a list of most visited and downloaded ERSA-ADN papers.

No particular order

More ERSA-ADN Technical Papers

Dr. Yohei Hori
Tackling the Security Issues of FPGA Partial Reconfiguration with Physical Unclonable Function
Dr. Yohei Hori
National Institute of Advanced Science and Technology, Japan
ERSA 2012


Protecting the confidentiality and integrity of FPGA is of significant concern in electronics markets as FPGAs are coming into common use in the commercial, industrial and other field of products. Since the configuration information of FPGA is just an electronic data stream, it can be easily eavesdropped and tampered on the data bus or network. Such security issues are clearly hindering the use of partial reconfiguration systems, where users can download favorite circuits from the Internet on demand.

Prof. Jürgen Teich
Verifying the Authorship of Embedded IP Cores: Watermarking and Core Identification Techniques
Prof. Jürgen Teich and Dr. Daniel Ziener
University of Erlangen-Nuremberg, Germany
ERSA 2011


In this paper, we present an overview of new watermarking and identification techniques for FPGA IP cores. Unlike most existing watermarking techniques, the focus of our techniques lies on ease of verification, even if the protected cores are embedded into a product. Moreover, we have concentrated on higher abstraction levels for embedding the watermark, particularly at the logic level, where IP cores are distributed as netlist cores. With the presented watermarking methods, it is possible to watermark IP cores at the logic level and identify them with a high likelihood and in a reproducible way in a purchased product from a company that is suspected to have committed IP fraud. The investigated techniques establish the authorship by verification of either an FPGA bitfile or the power consumption of a given FPGA.

Prof. Stephen Brown
Towards OpenCL Compilation into High-Performance Hardware for FPGAs
Prof. Stephen Brown
University of Toronto & Altera, Canada
ERSA 2012


Hardware acceleration using FPGAs has shown orders of magnitude reduction in runtime of computationally-intensive applications in comparison to traditional stand-alone computers [1]. This is possible because on an FPGA many computations can be performed at the same time in a truly- parallel fashion. However, parallel computation at a hardware level requires a great deal of expertise, which limits the adoption of FPGA-based acceleration platform.

J. Paul Morrison
Flow-Based Programming
J. Paul Morrison
J.P. Morrison Enterprises Ltd., Unionville, Ontario, Canada
ADN Issue 1, Mar 2013


In this paper, we give a short description of an application development technology called Flow-Based Programming (FBP), briefly describing its basic concepts, history, and some of our experience with it. An early implementation of FBP has been in continuous production use for almost 40 years, but it is attracting attention world-wide as it is a significant and important paradigm in building and maintaining computer applications.

Prof. David Lorge Parnas
How Engineering Mathematics can Improve Software
Prof. David Lorge Parnas
Middle Road Software, Inc, Canada
ERSA 2011


For many decades we have been promised that the “Formal Methods” developed by computer scientists would bring about a drastic improvement in the quality and cost of software development. That improvement has not materialized. We review the reasons for this failure. We then explain the difference between the notations that are used in formal methods and the mathematics that is essential in other areas of Engineering. Finally, we illustrate the way that Engineering Mathematics has proven useful in a variety of software projects.

Parlament, London

London, United Kingdom

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